搜索资源列表
FPGA_4FFT
- 针对高速数字信号处理的要求,提出用FPGA 实现基- 4FFT 算法,并对其整体结构、蝶形单 元进行了分析. 采用蝶算单元输入并行结构和同址运算,能同时提供蝶形运算所需的4 个操作 数,具有最大的数据并行性,能提高处理速度 按照旋转因子存放规则,蝶形运算所需的3 个旋转 因子地址相同,且寻址方式简单 输出采取与输入相似的存储器 运算单元同时采用3 个乘法的 复数运算算法来实现.-In accordance with the requirements of high speed d
project1_report1
- The purpose of this project is to explore the issues and implementation of a multiple instruction stream, single data stream processor. We are running two instruction streams on two CPUs which share an address space. The processors share a second lev
VLSI_Architectures_for_ECC
- This thesis devoted to several efficient VLSI architecture design issues in errorcorrecting coding, including finite field arithmetic, (Generalized) Low-Density Parity- Check (LDPC) codes, and Reed-Solomon codes.-This thesis is devoted to sever
FreeDCT-L
- Project 2D DCT core - specifications and codes-Project 2D DCT core- specifications and codes
dct
- Project 2D DCT core - specifications and codes-Project 2D DCT core- specifications and codes
dct-thesis
- Project 2D DCT core - specifications and codes-Project 2D DCT core- specifications and codes
dct2
- Project 2D DCT core - specifications and codes-Project 2D DCT core- specifications and codes
Encoders_for_Block_Circulant_LDPC_Codes
- In this paper, we present two encoding methods for block-circulant LDPC codes. The first is an iterative encoding method based on the erasure decoding algorithm, and the computations required are well organized due to the blockcirculant struc
microsteptutorial
- VHDL Microstepping driver building codes and handbook
Combinational_Divider_in_FPGA
- Three VHDL codes for combinational divider with implementation results for Xilinx Spartan FPGAs-Three VHDL codes for combinational divider with implementation results for Xilinx Spartan FPGAs
vhdl_programs_doc
- A lot of VHDL codes that can help beginners in that language.
VHDL_ONLY_donkey_pong
- vhdl codes for developers
new-folder
- These folder contain VHDL codes for addition,subtraction,multiplication etc.
vhdlqpsk
- qpsk in vhdl and its codes explination
ModelSim_SE_Plus_v5.7F_Real_Working
- model sim simulator of vhdl and verilog codes
Lab5_2013
- lab 5 for nitk students vhdl codes
FIR_poroje
- this project is about FIR FIlter By VHdl codes in the ISE.
code
- Basic codes in VHDL like d flipflop,register -Basic codes in VHDL like d flipflop,register ............